horizontal deflection transistor . . . designed for use in televisions. ? collectoremitter voltages v ces 1500 volts ? fast switching e 400 ns typical fall time ? low thermal resistance 1 c/w increased reliability ? glass passivated (patented photoglass). triple diffused mesa technology for long term stability ??????????????????????? ??????????????????????? maximum ratings ???????????? ???????????? rating ????? ????? symbol ?????? ?????? bu208a ??? ??? unit ???????????? ???????????? collectoremitter voltage ????? ????? v ceo(sus) ?????? ?????? 700 ??? ??? vdc ???????????? ???????????? collectoremitter voltage ????? ????? v ces ?????? ?????? 1500 ??? ??? vdc ???????????? ???????????? emitterbase voltage ????? ????? v eb ?????? ?????? 5.0 ??? ??? vdc ???????????? ? ?????????? ? ???????????? collector current e continuous e peak ????? ? ??? ? ????? i c i cm ?????? ? ???? ? ?????? 5.0 7.5 ??? ? ? ? ??? vdc ???????????? ???????????? base current e continuous e peak (negative) ????? ????? i b i bm ?????? ?????? 4.0 3.5 ??? ??? adc ???????????? ? ?????????? ? ???????????? total power dissipation @ t c = 95 c derate above 95 c ????? ? ??? ? ????? p d ?????? ? ???? ? ?????? 12.5 0.625 ??? ? ? ? ??? watts w/ c ???????????? ? ?????????? ? ???????????? operating and storage junction temperature range ????? ? ??? ? ????? t j , t stg ?????? ? ???? ? ?????? 65 to +115 ??? ? ? ? ??? c ??????????????????????? ??????????????????????? thermal characteristics ???????????? ???????????? characteristic ????? ????? symbol ?????? ?????? max ??? ??? unit ???????????? ???????????? thermal resistance, junction to case ????? ????? r q jc ?????? ?????? 1.6 ??? ??? c/w ???????????? ? ?????????? ? ???????????? maximum lead temperature for soldering purpose, 1/8 from case for 5 seconds ????? ? ??? ? ????? t l ?????? ? ???? ? ?????? 275 ??? ? ? ? ??? c notes: 1. pulsed 5.0 ms, duty cycle 10%. 2. see page 3 for additional ratings on a type. 3. figures in ( ) are standard ratings on semiconductor guarantees are superior. on semiconductor ? semiconductor components industries, llc, 2001 march, 2001 rev. 9 1 publication order number: bu208a/d bu208a 5.0 amperes npn silicon power transistor 700 volts case 107 to204aa (to3)
bu208a http://onsemi.com 2 ????????????????????????????????? ????????????????????????????????? electrical characteristics (t c = 25 c unless otherwise noted) ????????????????? ????????????????? characteristic ????? ????? symbol ????? ????? min ???? ???? typ ???? ???? max ??? ??? unit ????????????????????????????????? ????????????????????????????????? off characteristics ????????????????? ? ??????????????? ? ????????????????? collectoremitter sustaining voltage (i c = 100 madc, l = 25 mh) ????? ? ??? ? ????? v ceo(sus) ????? ? ??? ? ????? 700 ???? ? ?? ? ???? e ???? ? ?? ? ???? e ??? ? ? ? ??? vdc ????????????????? ????????????????? collector cutoff current 1 all types (v ce = rated v ces , v be = 0) ????? ????? i ces ????? ????? e ???? ???? e ???? ???? 1.0 ??? ??? madc ????????????????? ? ??????????????? ? ? ??????????????? ? ????????????????? emitter base voltage 1 (i c = 0, i e = 10 madc) (i c = 0, i e = 100 madc) ????? ? ??? ? ? ??? ? ????? v ebo ????? ? ??? ? ? ??? ? ????? 5 e ???? ? ?? ? ? ?? ? ???? e 7 ???? ? ?? ? ? ?? ? ???? e e ??? ? ? ? ? ? ? ??? vdc ????????????????????????????????? ????????????????????????????????? on characteristics 1 ????????????????? ????????????????? dc current gain (i c = 4.5 adc, v ce = 5 vdc) ????? ????? h fe ????? ????? 2.25 ???? ???? e ???? ???? e ??? ??? ????????????????? ? ??????????????? ? ????????????????? collectoremitter saturation voltage (i c = 4.5 adc, i b = 2 adc) ????? ? ??? ? ????? v ce(sat) ????? ? ??? ? ????? e ???? ? ?? ? ???? e ???? ? ?? ? ???? 1 ??? ? ? ? ??? vdc ????????????????? ? ??????????????? ? ????????????????? baseemitter saturation voltage (i c = 4.5 adc, i b = 2 adc) ????? ? ??? ? ????? v be(sat) ????? ? ??? ? ????? e ???? ? ?? ? ???? e ???? ? ?? ? ???? 1.5 ??? ? ? ? ??? vdc ????????????????????????????????? ????????????????????????????????? dynamic characteristics ????????????????? ????????????????? currentgain bandwidth product (i c = 0.1 adc, v ce = 5 vdc, f test = 1 mhz) ????? ????? f t ????? ????? e ???? ???? 4 ???? ???? e ??? ??? mhz ????????????????? ? ??????????????? ? ????????????????? output capacitance (v cb = 10 vdc, i e = 0, f test = 1 mhz) ????? ? ??? ? ????? c ob ????? ? ??? ? ????? e ???? ? ?? ? ???? 125 ???? ? ?? ? ???? e ??? ? ? ? ??? pf ????????????????????????????????? ????????????????????????????????? switching characteristics ????????????????? ? ??????????????? ? ????????????????? storage time (see test circuit fig. 1) (i c = 4.5 adc, i b1 = 1.8 adc, l b = 10 m h) ????? ? ??? ? ????? t s ????? ? ??? ? ????? e ???? ? ?? ? ???? 8 ???? ? ?? ? ???? e ??? ? ? ? ??? m s ????????????????? ????????????????? fall time (see test circuit fig. 1) (i c = 4.5 adc, i b1 = 1.8 adc, l b = 10 m h) ????? ????? t f ????? ????? e ???? ???? 0.4 ???? ???? e ??? ??? m s 1 pulse test: pw = 300 m s; duty cycle 2%.
bu208a http://onsemi.com 3 figure 1. switching time test circuit +40 v +40 v 1 k 1 k 1n5242 (12 v) 10 k 3 15 1 14 2 16 10 nf 2k7 3k3 2 k 220 680 nf 820 10 nf mpsu04 10 k 100 1 m f 400 ma 100 w l b t.u.t. 680 m f r b 0.56 1 a 1500 v 22 nf 22 nf 6.5 mh ly = 1.3 mh 0.5 m f 250 m f 7 mh 0.3 a fuse 130 v power supply tba920 80 60 40 20 0 40 80 120 160 200 figure 2. power derating t c , case temperature ( c) power dissipation (w)
bu208a http://onsemi.com 4 base drive the key to performance by now, the concept of controlling the shape of the turnoff base current is widely accepted and applied in horizontal deflection design. the problem stems from the fact that good saturation of the output device, prior to turnoff, must be assured. this is accomplished by providing more than enough i b1 to satisfy the lowest gain output device h fe at the end of scan i cm . worstcase component variations and maximum high voltage loading must also be taken into account. if the base of the output transistor is driven by a very low impedance source, the turnoff base current will reverse very quickly as shown in figure 3. this results in rapid, but only partial collector turnoff, because excess carriers become trapped in the high resistivity collector and the transistor is still conductive. this is a high dissipation mode, since the collector voltage is rising very rapidly. the problem is overcome by adding inductance to the base circuit to slow the base current reversal as shown in figure 4, thus allowing access carrier recombination in the collector to occur while the base current is still flowing. choosing the right l b is usually done empirically since the equivalent circuit is complex, and since there are several important variables (i cm , i b1 , and h fe at i cm ). one method is to plot fall time as a function of l b , at the desired conditions, for several devices within the h fe specification. a more informative method is to plot power dissipation versus i b1 for a range of values of l b . this shows the parameter that really matters, dissipation, whether caused by switching or by saturation. for very low l b a very narrow optimum is obtained. this occurs when i b1 h fe i cm , and therefore would be acceptable only for the atypicalo device with constant i cm . as l b is increased, the curves become broader and flatter above the i b1 . h fe = i cm point as the turn off atailso are brought under control. eventually, if l b is raised too far, the dissipation all across the curve will rise, due to poor initiation of switching rather than tailing. plotting this type of curve family for devices of different h fe , essentially moves the curves to the left, or right according to the relation i b1 h fe = constant. it then becomes obvious that, for a specified i cm , an l b can be chosen which will give low dissipation over a range of h fe and/or i b1 . the only remaining decision is to pick i b1 high enough to accommodate the lowest h fe part specified. neither l b nor i b1 are absolutely critical. due to the high gain of on semiconductor devices it is suggested that in general a low value of i b1 be used to obtain optimum efficiency e eg. for bu208a with i cm = 4.5 a use i b1 1.5 a, at i cm = 4 a use i b1 1.2 a. these values are lower than for most competition devices but practical tests have showed comparable efficiency for on semiconductor devices even at the higher level of i b1 . an l b of 10 m h to 12 m h should give satisfactory operation of bu208a with i cm of 4 to 4.5 a and i b1 between 1.2 and 2 a. test circuit waveforms figure 3. figure 4. i b i c i b i c (time) (time) test circuit optimization the test circuit may be used to evaluate devices in the conventional manner, i.e., to measure fall time, storage time, and saturation voltage. however, this circuit was designed to evaluate devices by a simple criterion, power supply input. excessive power input can be caused by a variety of problems, but it is the dissipation in the transistor that is of fundamental importance. once the required transistor operating current is determined, fixed circuit values may be selected.
bu208a http://onsemi.com 5 14 0.01 figure 5. dc current gain i c , collector current (a) 4 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 12 10 9 8 2.8 0.1 figure 6. collectoremitter saturation voltage i b , base current continuous (a) 0.2 0.5 1.0 2.0 10 2.4 2.0 1.6 1.2 1.6 0.1 figure 7. baseemitter saturation voltage i c , collector current (a) 0.2 0.5 1.0 2.0 10 1.5 1.4 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.1 figure 8. collector saturation region i c , collector current (a) 0 0.2 0.5 1.0 2.0 5.0 10 0.4 0.3 0.2 0.1 i c /i b = 3 15 1 figure 9. maximum forward bias safe operating area v ce , collector-emitter voltage (v) 13 11 h fe , dc current gain v ce = 5 v , collector current (a) i c 0.001 2 5 10 20 50 100 200 500 1000 2000 1.3 7 6 5 v ce(sat) , collector-emitter saturation voltage (v) i c /i b = 2 v be , base-emitter voltage (v) 5.0 i c /i b = 2 0.8 0.4 5.0 i c = 3.5 a i c = 2 a i c = 3 a i c = 4 a i c = 4.5 a 10 5 2 1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 t c 95 c i c (max.) i cm (max.) 1 m s 2 5 10 20 50 100 200 300 1 ms 2 ms d.c. bu208,a 1 1 pulse width 20 m s. duty cycle 0.25. r be 100 ohms. v ce(sat) , collector-emitter saturation voltage (v) bonding wire limit thermal limit second breakdown limit duty cycle 1%
bu208a http://onsemi.com 6 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. all rules and notes associated with referenced to-204aa outline shall apply. style 1: pin 1. base 2. emitter case: collector dim min max min max millimeters inches a 1.550 ref 39.37 ref b --- 1.050 --- 26.67 c 0.250 0.335 6.35 8.51 d 0.038 0.043 0.97 1.09 e 0.055 0.070 1.40 1.77 g 0.430 bsc 10.92 bsc h 0.215 bsc 5.46 bsc k 0.440 0.480 11.18 12.19 l 0.665 bsc 16.89 bsc n --- 0.830 --- 21.08 q 0.151 0.165 3.84 4.19 u 1.187 bsc 30.15 bsc v 0.131 0.188 3.33 4.77 a n e c k t seating plane 2 pl d m q m 0.13 (0.005) y m t m y m 0.13 (0.005) t q y 2 1 u l g b v h case 107 to204aa (to3) issue z
bu208a http://onsemi.com 7 notes
bu208a http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 13036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. bu208a/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland
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